Int.Conf.Papers (Peer-Reviewed)

 

(2009)

1.         S.Kawahito,“Recent Progress of CMOS Imaging Devices,” IDW’09 (CD-R), INP1-1,Miyazaki,Dec.2009 (Invited)

2.         M. S. Z. Sarker, I. Takai, M. Andoh, K. Yasutomi, S. Itoh, S. Kawahito, “A CMOS imager and 2-D light pulse receiver array for spatial optical communication,” IEEE Asian Solid-State Circuits Conference(CD-R),pp113-116,Taipei, Nov.2009

3.         K. Yasutomi, S. Itoh, S. Kawahito, T. Tamura,“Two-stage charge transfer pixel using pinned diodes for low-noise global shutter imaging,” Int. Image Sensor w/s, Bergen,Jun.2009

4.         S. Kawahito, S. Suh, T. Shirei, S. Ito,“Noise reduction effect of column-parallel correlated multiple sampling for CMOS image sensors,”Int. Image Sensor w/s, Bergen,Jun.2009

5.         T. Watanabe, J.-H. Park, S. Aoyama, K. Isobe, S. Kawahito,“Effects of negative bias operation and optical stress on dark current,”Int. Image Sensor w/s, p4,Bergen,Jun.2009(poster)

6.         S. Suh, S. Itoh, S. Kawahito, T. Shirei, S. Aoyama, C. Nishimura,“Noise reduction effect of column-parallel correlated multiple sampling for CMOS image sensors,”EOS Conferences 2009, pp15, Munich,Jun.2009

7.         A. Matsuzawa, G. Gielen, M. Hershenson, S. Kawahito, S. Dosho, “How to design the future mixed signal LSI's,” Proc. SASIMI2009, pp.485, Okinawa, Mar.2009. (Invited, Panel discussion)

8.         J. H. Park, S. Aoyama, T. Watanabe, T. Akahori, T. Kosugi, K. Isobe, Y. Kaneko, Z. Liu, K. Muramatsu, T. Matsuyama, S. Kawahito, “A 0.1e -vertical FPN 4.7e- read noise 71dB DR CMOS image sensor with 13b column-parallel single-ended cyclic ADCs,” 2009 IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp.268-269, San Francisco Feb.2009.

9.         Md. S. Z. Sarker, I. Takai, M. Andoh, K. Yasutomi, S. Itoh, S. Kawahito, “A CMOS active pixel sensor for optical communication,” IS&T Electronic Imaging Science and Tech., 7249-21, San Jose, Jan.2009.

10.     K. Yasutomi, T. Tamura, M. Furuta, S. Ito, S. Kawahito, “A global electronic shutter pixel using pinned diodes fabricated in standard CMOS-image sensor technology,” IS&T Electronic Imaging Science and Tech., 7249-14, San Jose, Jan.2009.

(2008)

11.     T. Sawada, K. Ito, M. Nakayama, S. Kawahito, “TOF Range Image Sensor Using A Range-Shift Technique”, IEEE Sensors, pp.1390-1393, Oct.2008.

12.     S. Kawahito, K. Honda, Z. Liu, K. Yasutomi, S. Itoh, “A 15b Power-Efficient Pipeline A/D Converter Using Non-Slewing Closed-Loop Amplifiers”, IEEE Custom Integrated Circuits Conf., pp.117-120, Sept.2008.

13.     H.-J. Yoon, S. Itoh, S. Kawahito, “A CMOS Image Sensor using Two-Stage Charge Transfer Technique for Fluorescence Lifetime Imaging”, EuroSensors 2008, pp.1474-1477, Sept.2008.

14.     S. Itoh, S. Kawahito, “A low-power data transmission technique using inductive coupling and its application to biomedical sensor devices”, 2008 CMOS Emerging Technologies Workshop, Aug.2008 (invited).

15.     Z. Liu, K.Honda, S.Kawahito, “A New Calibration Method for Sampling Clock Skew in Time-Interleaved ADC”, Proc. IEEE Int. Inst. Measurement Tech. Conf., pp.1107-1110, May. 2008.

16.     S. Kawahito, “CMOS Time-of-Flight Range Image Sensors, The 4th Fraunhofer IMS Workshop on CMOS-Imaging CD-R, May 2008. (invited).

17.     S. Kawahito, J-H. Park, K. Isobe, S. Suhaidi, T. Iida, T. Mizota, “A CMOS Image Sensor Integrating Column-Parallel Cyclic ADCs with On-Chip Digital Error-Correction Circuits”, Dig. Tec. Papers 2008 IEEE Int. Solid-State Circuits Conf., pp.56-57, Feb.2008.

18.     S. B. Shafie, S. Kawahito, “A wide dynamic range image sensor with dual charge storage in a pixel and a multiple sampling technique”, Proc. SPIE, Electronic Imaging 2008, vol.6816, Jan.2008.

19.     S. Kawahito, S. Ito, “Noise calculation model and analysis of high-gain readout circuits for CMOS image sensors”, Proc. SPIE, Electronic Imaging 2008, vol.6816, Jan.2008.

(2007)

20.     S. Kawahito, “CMOS Sensors for Smart and Advanced Imaging”, the 3rd Korean-Japanese Student Workshop, pp.6-15, Oct.2007 (invited).

21.     S. Kawahito, “Signal Processing Architectures for Low-Noise High-Resolution CMOS Image Sensors”, Proc. Custom Integrated Circuits Conf., 20-5, Sep.2007. (invited)

22.     T. Sawada, S. Kawahito, M. Nakayama, K. Ito, I. A. Halin, M. Homma, T. Ushinaga, Y. Maeda, “A Time-of-Flight range image sensor with an improved ambient light charge draining structure”, Proc. EOS Conf. on Frontiers in Electronic Imaging, pp.66-67, Jun.2007.

23.     K. Honda, Z. Liu, M. Furuta, S. Kawahito, “A 14b Low-power Pipeline A/D Converter Using a Pre-charging Technique”, Proc. 2007 Symp. on VLSI Circuits, 19-2, pp.196-197, Jun.2007.

24.     S. Kawahito, N. Kawai, “Column Parallel Signal Processing Techniques for Reducing Thermal and Random Telegraph Noises in CMOS Image Sensors”, Proc. Int. Image Sensor Workshop, Session 12, pp. 226-229, Jun.2007.

25.     T. Sawada, S. Kawahito, M. Nakayama, K. Ito, I. A. Halin, M. Homma, T. Ushinaga, Y. Maeda, “A TOF Range Image Sensor with an Ambient Light Charge Drain and Small Duty-Cicle Light Pulse”, Proc. Int. Image Sensor Workshop, Session 14, pp.254-257, Jun.2007.

26.     Z. Liu, K. Honda, M. Furuta, S. Kawahito, “Timing Error Calibration in Time-Interleaved ADC by Sampling Clock Phase Adjustment”, Proc. 2007 IEEE Instrumentation and Measurement Technology Conf., We3ab, p.32, May.2007.

27.     S. Kawahito, “Noise at the Circuit Level”, 2007 IEEE ISSCC Forum Noise in Imagings Systems, pp.89-116, Feb.2007 (invited).

28.     S. Kawahito, “A CMOS Time-of-Flight Range Image Sensor for Real-Time 3D Imaging”, The 3rd Int. Symp. on Nanobision Science / The 9th Joint Int. Conf. on Advance Science and Technology, Session 9-3, Jan.2007.

29.     M. Yamaguchi, S. Koya, T. Hideki, Y. Shimada, S. Aoyama, S. Kawahito, “Shielded loop type on-chip magnetic field probe to evaluate radiated emission from thin-film noise suppressor”, Proc. Intermag Conf., Jan. 2007.

(2006)

30.     S. Kawahito, “CMOS Image Sensors for Automobile Applications”, Proc. The 6th Taiwan-Japan Microelectonics Int. Symp., no.16, Hsinchu, Nov. 2006 (invited).

31.     S. Kawahito, “Circuit and Device Technologies for CMOS Functional Image Sensors”, Proc. IFIP Int. Conf. on VLSI-SoC 2006, pp.42-47, Oct.2006.(invited)

32.     H. J. Yoon, S. Kawahito, "A CMOS Image Sensor for Fluorescence Lifetime Imaging", Proc. IEEE Sensors 2006, pp.400-403, Oct. 2006.

33.     S. Shafie, S. Kawahito, “A Wide Dynamic Range CMOS Image Sensor with Gated Charge Storage and a Multiple Sampling Technique”, Proc. IEEE Sensors 2006, pp.404-407, Oct. 2006.

34.     S. Kawahito, “Low-Power Design of Pipeline A/D Converters”, Proc. IEEE Custom Integrated Circuits Conf 2006, pp.505-512, Sep.2006. (invited)

35.     S. Aoyama, S. Kawahito, M. Yamaguchi, “Fully Integrated Active Magnetic Probe for High-definition Near-Field Measurement”, Proc. 2006 IEEE EMC Symp., vol.2, pp.426-429, Aug.2006.

36.     K. Honda, F. Masanori, S. Kawahito, “A 1V 30mW 10b 100MSample/s Pipeline A/D Converter Using Capacitance Coupling Techniques, Dig. Tech. Papers, 2006 Symp. on VLSI Circuits, 25.4, pp.276-277, Honolulu, Jun.2006.

37.     M. Furuta, T. Inoue, Y. Nishikawa, S. Kawahito, “A 3500fps High-Speed CMOS Image Sensor with 12b Column-Parallel Cyclic A/D Converters”, Dig. Tech. Papers, 2006 Symp. on VLSI Circuits, 3.3, pp.27‐28, Honolulu, Jun.2006.

38.     S. Itoh, S. Kawahito, S. Terakawa, “A 2.6mW 2fps QVGA CMOS One-Chip Wireless Camera with Digital Image Transmission Function for Capsule Endoscopes”, Proc. 2006 IEEE Int. Symp. on Circuits and Systems, B3P-Z, pp.3353-3356, Kos, May.2006.

39.     K. Honda, M. Furuta, S. Kawahito, “A 1V 10b 125MSample/s A/D Converter Using Cascade Amp-Sharing and Capacitance Coupling Techniques”, Proc. 2006 IEEE Int. Symp. on Circuits and Systems, A3L-D, pp.1031-1034, Kos, May.2006.

40.     S. Aoyama, S. Kawahito, M. Yamaguchi, “An Active Magnetic Probe Array for the Multiple-point Concurrent Measurement of Electromagnetic Emissions”, Proc. The Intermag 2006 Conf., HC-6, p.882, San Diego, May.2006.

41.     J. H. Park, M. Mase, S. Kawahito, M. Sasaki, Y. Wakamori, Y. Ohta, “An ultrawide dynamic-range CMOS image sensor with a linear response”, Proc. IS&T/SPIE 18th Annual Symp. 60680B.1-8, San Jose, Jan.2006.

42.     T. Ushinaga, I. A. Halin, T. Sawada, S. Kawahito, M. Homma, Y. maeda, “A QVGA-Size CMOS Time-of Flight Range Image Sensor with Background Light Charge Draining Structure”, Proc. IS&T/SPIE 18th Annual Symp. Conf.# 6056, session-1, 605604.1-8, San Jose, Jan.2006.

(2005)

43.     S. Kawahito, “CMOS Time-of-Flight Range Image Sensors”, Proc. Int. Display Workshop ’05, pp. 2049-2052, Kobe, Dec.2005. (invited)

44.     J. H. Park, M. Mase, S. Kawahito, M. Sasaki, Y. Wakamori, Y. Ohta, “A 142dB Dynamic Range CMOS Image Sensor with Multiple Exposure Time Signals”, Proc. 2005 Asian Solid-State Circuits Conf., pp.85-88, Nov.2005.

45.     A. H. Izhal, T. Ushinaga, T. Sawada, M. Homma, Y. Maeda, S. Kawahito, “A CMOS Time-of-Flight Range Image Sensor with Gates on Field Oxide Structure”, Proc. IEEE Sensors 2005, pp.141-144, Oct.2005.

46.     K. Nakano, T. Takahashi, S. Kawahito, “A Highly Temperature-Stable MAGFET Array for CMOS Smart Rotary Encoders”, Proc. IEEE Int. Conf. Sensors 2005, pp.1053-1056, Oct.2005.

47.     S. Aoyama, S. Kawahito, T. Yasui, M. Yamaguchi, “A High-Sensitivity Active Magnetic Probe using CMOS Integrated Circuits Technology”, Proc. Electrical Performance of Electronic Packaging 2005, Poster, pp.115-121, Austin, Oct.2005.

48.     T. Takahashi, K. Nakano, S. Kawahito, “A CMOS Rotary Encoder System Using Magnetic Sensor Arrays”, LDIA 2005, Poster, pp.215-218, Sep.2005.

49.     S. Kawahito, “An ultimate dynamic range imaging device – from star light to sun light”, Key note lecture, Proc. The 4th Int. conf. on Global Research and Education, vol.1, pp105-113, Wuppertal, Sep. 2005. (invited)

50.     S. Aoyama, S. Kawahito, T. Yasui, M. Yamaguchi, “An SOI-CMOS Active Magnetic Probe for High-Frequency Electromagnetic Emissions”, 2005 Int. Conf. on Solid State Devices and Materials, D-5-1, pp.304-305, Kobe, Sep. 2005.

51.     M. Furuta, S. Kawahito, T. Inoue, Y. Nishikawa, “A cyclic A/D converter with pixel noise and column-wise offset cancellation for CMOS image sensors”, Proc. European Solid-State Circuits Conf. pp.411-414, Grenoble, Sep.2005.

52.     M. Sasaki, M. Mase, S.Kawahito, Y. Wakamori, “A Wide Dynamic Range CMOS Image Sensor with Multiple Exposure Time Signals and Column-Parallel Cyclic A/D Converters”, Proc. IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, pp.218-221, Karuizawa, June 2005.

53.     N. Kawai, S. Kawahito, M. Sasaki, “A Low-Noise Signal Readout Circuit Using Double-Stage Noise Canceling Architecture”, Proc. IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, pp.27-30, Karuizawa, June 2005.

54.     M. Sakakibara, S. Kawahito, “A Column Parallel Double Integration Type A/D Converter for CMOS Image Sensors”, Proc. ITC-CSCC, pp. 189-190, Jeju, 2005.

55.     Y. Nishikawa, S. Kawahito, “A parallel image compression system for high-speed cameras”, Proc. IEEE Int. Workshop on Imaging System and Techniques, pp.53-57, Niagara Falls, May. 2005.

56.     M. Mase, S. Kawahito, M. Sasaki, Y. Wakamori,“A 19.5b Dynamic Range CMOS Image Sensor with 12b column-Parallel Cyclic A/D Converters”, Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf. pp. 350-351, Feb. 2005.

57.     S. Kawahito, T. Takahashi, Y. Nagano, K. Nakano, “A CMOS Rotary Encoder System Based on Magnetic Pattern Analysis with a Resolution of 10b per Rotation”, Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf., pp. 240-241 Feb. 2005.

58.     Y. Nishikawa, S. Kawahito, T. Inoue, “Parallel image compression circuits for high-speed cameras”, Proc. SPIE Electronic Imaging, vol.5671, no.14, Jan.2005.

59.     S. Itoh, S. Kawahito, T. Akahori, S. Terakawa, “Design and implementation of a one-chip wireless camera device for a capsule”, Proc. SPIE Electronic Imaging, vol.5671, no.12, Jan.2005.

(2004)

60.     M. Sasaki, M. Mase, S. Kawahito, Y. Tadokoro, “A wide dynamic range CMOS image sensor with multiple short-time exposures”, Proc. 3rd IEEE Int. Conf. Sensors, pp.968-972, Oct. 2004.

61.     T. Takahashi, K. Nakano, S. Kawahito, “CMOS magnetic sensor arrays using native-substrate MAGFETs for a smart rotary encoder”, Proc. 3rd IEEE Int. Conf. Sensors, pp.973-976, Oct. 2004.

62.     T. Inoue, S. Takeuchi, S. Kawahito, “A CMOS active pixel image sensor with in-pixel CDS for high-speed cameras”, Proc. SPIE-IS&T, vol. 5580,

63.     T. Inoue, S. Takeuchi, S. Kawahito, “A CMOS active pixel image sensor with in-pixel CDS for high-speed cameras”, Proc. SPIE-IS&T, vol.5301A, Jan. 2004.

64.     S. Kawahito, I. A. Halin, “Active pixel circuits for CMOS time-of-flight range image sensors”, Proc. SPIE-IS&T Electronic Imaging, vol.5302, Jan. 2004.

(2003)

65.     K.Nakano, T.Takahashi, S. Kawahito, “A CMOS Rotary Encoder Using Magnetic Sensor Arrays”, Book of Abstract, pp.27-28, 2nd IEEE Int. Conf. Sensors, pp.206-209, Toronto, Oct. 2003.

66.     D. Miyazaki, M. Furuta, S. Kawahito, “A 75m W 10bit 120M sample/s parallel pipeline ADC”, Proc. 29th European Solid-State Circuits Conf. 2003, Poster Session pp. 719-722, Estoril, Sept. 2003.

67.     M. Sakakibara, S. Kawahito, D.Handoko, N. Nakamura, H. Satoh, M. Higashi, K. Mabuchi, H. Sumi, “A CMOS image sensor using a gain-adaptive column amplifiers”, Proc. IEEE w/s CCD and Advanced Image Sensors, Elmau, May 2003.

68.     M. Sasaki, S. Kawahito, M. Mitsuhito, Y. Tadokoro, “A Wide Dynamic Range CMOS Image Sensor with Integration of Short-Exposure-Time Signals”, Proc. IEEE w/s CCDs and Advanced Image Sensors, Elmau, May 2003.

69.     A. Suzuki, S. Kawahito D. Miyazaki, M. Furuta, “A Digitally Skew Correctable Multi-Phase Clock Generator Using a Master-Slave DLL”, Proc. IEEE Int. Symp. Circuits and Systems 2003, vol.1, pp. 105-108, Bangkok, May 2003.

70.     S. Kawahito, M. Sakakibara, D. Handoko, N. Nakamura, H. Satoh, M. Higashi, K. Mabuchi, H. Sumi, “A Column-Based Pixel-Gain-Adaptive CMOS Image Sensor for Low-Light-Level Imaging”, Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf. 2003, 12.7, pp. 224-225, Feb. 2003.

71.     S. Kawahito, N. Kawai, “A Noise calculation model for high-gain column amplifiers of CMOS image sensors”, Proc. SPIE-IS&T, vol.5017, pp.48-58, Jan. 2003.

72.     S. Kawahito, S. Itoh, “A Photon count imaging using a extremely small capacitor and a high- precision low-noise quantizer”, Proc. SPIE-IS&T, vol.5017, pp.68-75, Jan. 2003.

73.     M. Sasaki, S. Kawahito, “Method to extend dynamic range CMOS image sensor using different frame-rate read out”, Proc. SPIE-IS&T, vol.5017, pp.76-85, Jan. 2003.

(2002)

74.     D. Miyazaki, M. Furuta, S. Kawahito, “High-speed low-power A/D converters for vision system LSIs”, Proc. 2002 Int. Symp. New Paradigm VLSI Computing, pp.17-20, Sendai, Dec. 2002.

75.     S. Kawahito, “Recent developments of CMOS sensor interfaces”, Proc. Eurosensors, pp.37-40, Sept. 2002 (invited).

76.     T. Kato, S. Kawahito, K. Kobayashi, H. Sasaki, T. Eki, T. Hisanaga, “A binocular CMOS range image sensor with bit-serial block-parallel interface using cyclic pipelined ADC’s”, Dig. Tech. Papers, 2002 Symp. VLSI circuits, pp.270-271, Honolulu, June 2002.

77.     M. Furuta, S. Kawahito, D. Miyazaki, “A digital calibration technique for pipelined analog-to-digital converters”, Proc. IEEE Inst. Meas. Tech. Conf., vol.1, pp. 713-717, Anchorage, May 2002.

78.     N. Kawai, S. Kawahito, Y. Tadokoro, “A low-noise oversamping signal detection technique for CMOS image sensors”, Proc. IEEE Inst. Meas. Tech. Conf., vol.1, pp.265-268, Anchorage, May 2002.

79.     S. Kawahito, A. Cerman, Tadokoro, “A digital fluxgate magnetic sensor interface using sigma-delta modulation for weak magnetic field measurement”, Proc. IEEE Inst. Meas. Tech. Conf., vol.1, pp. 257-260, Anchorage, May 2002.

80.     D. Miyazaki, M. Furuta, S. Kawahito, “A 16mW 30Msample/s 10b Pipelined A/D Converter Using Pseudo Differential Architecture”, Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf. no. 10.5, pp.174-175, February 2002

81.     S. Kawahito, N. Kawai, “A low-noise signal detection technique in CMOS image sensors using frame oversampling and non-destructive high-speed readout”, Proc. SPIE, vol. 4669, pp. 98-106, San Jose, January 2002.

(2001)

82.     S. Kawahito, K. Sawada, K. Tada, M. Ishida, Y. Tadokoro, “A chopperless pyroelectric active pixel infrared image sensor using chip shift operation”, Dig. Tech. Papers, 11th Int. Conf. Solid-State Sensors and Actuators, vol.1, pp. 574-577, June 2001.

83.     D. Handoko, S. Kawahito, Y. Tadokoro, A. Matsuzawa, “A CMOS image sensor with non-destructive intermediate readout mode for adaptive iterative search motion vector estimation”, IEEE Workshop CCD and Advanced Image Sensors, pp. 52-55. June 2001.

84.     S, Kawahito, N. Kawai, Y. Tadokoro, “A High-sensitivity oversampling digital signal detection technique for CMOS image sensors using non-destructive intermediate high-speed readout mode”, IEEE Workshop CCD and Advanced Image Sensors, pp.24-27. June 2001.

85.     S. Kawahito, T. Eki, Y. Tadokoro, “A bit-serial column parallel processing architecture for on-sensor discrete Fourier transform”, Proc. IEEE Int. Symp. Circuits and Systems, Sydney, May 2001.

86.     A. Cerman, P. Ripka, S. Kawahito, “Digital fluxgate magnetometers”, Abst., Joint Magnetic Workshop, March 2001.

87.     K. Sawada, S. Kawahito, M. Endo, Y. Tadokoro, H. Takao, M. Ishida, “Fabrication of Indium Micro Bumps for Hybrid Type Active Pixel CMOS Infrared Image Sensors”, Proc. the 3rd Int. Symp. on Electronics Materials and Packaging, March 2001.

88.     P. Ripka, S.O. Choi, S. Kawahito, M. Ishida, “Pulse excitation of the micro-fluxgate sensors”, Abst. 8th Joint MMM-Intermag. Conf, no. HG-09, p.506, January 2001.

(2000)

89.     D. Miyazaki, S. Kawahito, “Low-power area-efficient design of parallel pipeline A/D converters”, Ext. Abst., Int. Conf. Solid-State Devices and Materials, pp.382-383, August 2000.

90.     P. Ripka, S. O. Choi, A. Tipek, S. Kawahito, M. Ishida, “Symmetrical core improves micro-fluxgate sensors”, Proc. Eurosensors XIV, pp.899-903, Copenhagen, August 2000.

91.     P. Ripka, S. O. Choi, S. Kawahito , A. Tipek, M. Ishida, “Micro-fluxgate sensor with double-sided core”, Proc. EMSA, pp. 167-168, Dresden, July 2000.

92.     D. Handoko, S. Kawahito et. al. (4 authors, 2nd), “A CMOS image sensor for focal-plane low-power motion vector estimation”, Dig. Tech. Papers, Symp. VLSI Circuits, pp.28-29, June 2000.

93.     Shoji Kawahito, “Circuit and System Technology in the year 2010”, Symp. VLSI Circuits (Panel Discussion), June 2000. (invited)

(1999)

94.     P. Ripka, S. Kawahito, “Processing of fluxgate output signal”, Proc. 15th IMEKO, no.4-4-03, Osaka, June 1999.

95.     S. Kawahito, S. Choi, K. Aramaki, Y. Tadokoro, M. Ishida, “A delta-sigma interface technique with third-order noise shaping and its application to fluxgate sensor system”, Dig. Tech. Papers, IEEE Int. Conf. Solid-State Sensors and Actuators, pp.824-827, 1999.

96.     S. Kawahito, D. Handoko, J. Naka, Y. Tadokoro, “A CMOS image sensor with motion vector estimator for low-power image compression”, IEEE Instru. Meas. Tech. Conf., pp. 65-70, 1999. (invited)

97.     M. Sasaki, S. Kawahito, Y. Tadokoro, “A CMOS image sensor integrating gamma correction and gain control functions”, IEEE Workshop, CCD and Advanced Image Sensors, pp.52-55, 1999.

98.     S. Kawahito, Y. Tadokoro, “CMOS image sensor integrating low-power image compression circuits”, Proc. Int. Symp. Future of Intellectual Integrated Electronics, pp.365-369, Sendai, March 1999.

99.     C. Maier, S. Kawahito, M. Schneider, M. Zimmermann, H. Baltes, “2D magnetic micro fluxgate system with digital signal output”, Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf., pp. 130-131, 1999.

(1998)

100.  D. Handoko, S. Kawahito, Y. Tadokoro, A. Matsuzawa, “Focal plane motion vector estimation using iterative block matching and non-destructive image sensing”, Proc. SASIMI '98, pp.223-228, Sendai, Oct. 1998.

101.  A. Koll, S. Kawahito, C. Hagleitner, O. Bland, H. Baltes, “A flip-chip packaged CMOS chemical microsystem for detection of volatile organic compounds”, Proc. SPIE Smart Structures, pp. 223-232, March 1998.

102.  S. Kawahito, Y. Tadokoro, A. Matsuzawa, “CMOS image sensors with video compression”, Proc. ASP-DAC '98, pp. 595-600, Yokohama, March 1998 (invited).

103.  S. Kawahito, M. Yoshida, M. Sasaki, U. Keijiro, D. Miyazaki, K. Murata, S. Doushou A. Matsuzawa, “A CMOS smart image sensor LSI for focal-plane compression”, Proc. ASP-DAC '98, pp.339-340, Yokohama, March 1998.

(1997)

104.  M. Schneider, S. Kawahito, Y. Tadokoro, H. Baltes, “High sensitivity Micro Fluxgate Sensor”, Tech. Dig. IEEE Int. Electron Device Meeting, pp.907-910, 1997.

105.  S. Kawahito, “Integration of image sensors and image compression on a chip”, Proc. SASIMI '97, pp. 139-145, Osaka, Dec. 1997 (invited).

106.  M. Tsunoda, S. Kawahito, Y. Tadokoro, N. Kudo, “Analog two-dimensional discrete cosine transform LSI for image compression based on multirate sampling”, Proc. Int. Conf. Signal processing appli. and Tech., pp.1198-1202, San Diego, Sept.1997.

107.  S. Kawahito, M. Yoshida, M. Sasaki, K. Umehara, Y. Tadokoro, K. Murata, S. Doushou, A. Matsuzawa, “A compressed digital output CMOS image sensor with analog 2-D DCT processors and an ADC/Quantizer”, Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf., pp.184-185, Feb. 1997.

(1996)

108.  S. Choi, S. Kawahito, Y. Matsumoto, M. Ishida, Y. Tadokoro, “An integrated micro-fluxgate magnetic sensor with on-chip interface circuits”, Eurosensors X, vol. 5, pp.127-130, Sept. 1996.

109.  S. Kawahito, A. Yamasawa, S. Koga, Y. Tadokoro, K. Mizuno, O. Tabata, “Digital interface circuits using sigma-delta modulation for integrated micro-fluxgate magnetic sensors”, Proc. IEEE Int. Symp. Circuits and Systems, vol.4, pp.34-343, May 1996.

110.  S. Kawahito, Y. Tadokoro, “High-performance micro-fluxgate magnetic sensors”, Proc. Int. Conf. Microelectronics, pp. 84-88 , Jan. 1996.

(1995)

111.  S. Kawahito, M. Sutoh, A. Yamasawa, Y. Tadokoro, “Micro-fluxgate magnetic sensing elements based on silicon microtechnology”, Proc. Int. Symp. MIMR, pp.134- 137, Oct. 1995.

112.  Y. Tadokoro, H. Yasuo, S. Kawahito, “A new discrete cosine transform algorithm and its simple high-speed VLSI algorithms for 2D DCT”, Proc. Euro. Conf. Circuits Theory and Design, pp.231-234, Istanbul, August 1995.

113.  S.Kawahito, H. Satoh, M. Sutoh, Y. Tadokoro, “Micro-fluxgate magnetic sensing elements using closely-coupled excitation and pick-up coils”, Dig. Tech. Papers, Int. Conf. Solid-State Sensors and Actuators, vol.2, pp.233-236, Stockholm, June 1995.

(1994)

114.  T. Aoki, Y. Watanabe, T. Higuchi, S. Kawahito, Y. Tadokoro, “Multiwave computing circuits using integrated opto-electronic devices”, Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf. no.TA7.7, pp.134-135, San Francisco, Feb. 1994.

(1993)

115.  Y. Lee, H. Seo, M. Arai, M. Ishida, S. Kawahito, T. Nakamura, “High-temperature pressure sensor using double SOI structures with two Al2O3 films”, Dig. Tech. Papers, Int. Conf. Solid- State Sensors and Actuators, pp.624-627, Yokohama, June 1993.

116.  S. Kawahito, Y. Sasaki, M. Ishida, T. Nakamura, “A fluxgate magnetic sensor with micromachined solenoids and  electroplated permalloy cores”, Dig.Tech.Papers,Int. Conf. Solid-State Sensors and Actuators, pp.888-891, Yokohama, June 1993.

117.  S. Kawahito, S.O. Choi, M. Ishida, T. Nakamura, “MOS Hall elements with three-dimensional microstructure”, Dig. Tech. Papers, Int. Conf. Solid-State Sensors and Actuators, pp.892-895, Yokohama, June 1993.

(1992)

118.  S. Kawahito, Y. Mitsui, M.Ishida, T. Nakamura, “Parallel hardware algorithm with redundant number representations for multiple-valued arithmetic VLSI”, Proc. IEEE Int. Symp. Multiple-Valued Logic, pp.337-345, Sendai, May 1992.

(1991)

119.  G.S. Chung, S. Kawahito, M. Ishida, T. Nakamura, “Application of a SOI  structure to pressure sensor”, Tech. Dig., 2nd Int. Symp. Micromachine and Human Sci., pp.177-187, Nagoya, 1991.

120.  G.S. Chung, S. Kawahito, M. Ashiki, M. Ishida, T. Nakamura, “Novel high-temperature pressure sensors using double SOI structure”, Dig. Tech. Papers, Int. Conf. Solid-State Sensors and Actuators, pp.676-681, San Francisco, June 1991.

121.  S. Kawahito, Y. Sasaki, M. Ashiki, T. Nakamura, “Micromachined solenoids for highly sensitive magnetic sensors”, Dig. Tech. Papers, Int. Conf. Solid-State Sensors and Actuators, pp.1077-1080, San Francisco, June 1991.

122.  S. Kawahito, J. Takahashi, M. Ashiki, T. Nakamura, “A parallel signal  processing  technique using MOS current-mode analog circuits for smart image sensors”, Dig. Tech. Papers, Int. Conf. Solid-State Sensors and Actuators, pp. 326-329, San Francisco, June 1991.

123.  S. Kawahito, K. Mizuno, T. Nakamura, “Multiple-valued current-mode arithmetic circuits based on redundant positive-digit number representations”, Proc. IEEE Int. Symp. Multiple-Valued Logic, pp.330-339, Victoria, May 1991.

124.  S. Kawahito, N. Karita, M. Ishida, M. Ashiki, S. Usui, T. Nakamura, “Integrated circuits for biotelemetry system”, Proc. 4th Int. Forum ASIC and Transducer Technology, pp.191-199, Leuven, May 1991.

(1990)

125.  N. Karita, S. Kawahito, M. Ishida, S. Usui, T. Nakamura, S. Nagaoka, “A multichannel multiple-object biotelemetry system”, Proc. 11th Int. Symp. Bioteleme, pp.50-53, Yokohama, Aug. 1990.

126.  S. Kawahito, N. Karita, M. Miyaoka, M. Ishida, S. Usui, T. Nakamura, S. Nagaoka, “A high-speed wide-dynamic range optical receiver for multichannel biotelemetry system”, Proc. 11th Int. Symp. Biotelemetry, pp.47-48, Yokohama, Aug. 1990.

(1989)

127.  S. Kawahito, M. Kameyama, T. Higuchi, “High-performance multiple-valued radix-2 signed-digit multiplier and its application”, Dig. Tech. Papers, Symp. VLSI Circuits, pp.125-126, Kyoto, May 1989.

(1988)

128.  S. Kawahito, M. Kameyama, T. Higuchi, “Multiple-valued bi-directional current-mode MOS technology and its applications”, Int. Workshop Fuzzy System Applications, pp.112-113, Iizuka, August 1988.

(1987)

129.  S. Kawahito, M. Kameyama, T. Higuchi, H. Yamada, “A high-speed compact multiplier based on multiple-valued bi-directional current-mode circuits”, Proc. IEEE Int. Symp. Multiple-Valued Logic, pp.172-180, Boston, May 1987.

130.  S. Kawahito, M. Kameyama, T. Higuchi, H. Yamada, “A 32 x 32 bit  multiplier using multiple-valued MOS current-mode circuits”, Dig. Tech. Papers, Symp. VLSI Circuits, pp.99-100, Kyoto, May 1987.

(1986)

131.  S. Kawahito, M. Kameyama, T. Higuchi, “VLSI-oriented bi-directional current-mode arithmetic circuits based on the radix-4 signed-digit number system”, Proc. IEEE Int. Symp. Multiple-Valued Logic, pp.70-77, Blacksburg, May 1986.