Home > Research project > On-Sensor Image Compression

[ Japanese | English ]

On-Sensor Image Compression

A smart CMOS image sensor for low-power image compression has been developed. This tiny one-chip camera module chip is useful for a capsule-type endoscope. This chip has been presented at ISSCC 1997.

Block Diagram. Image Sensor Chip.


  1. S. Kawahito, M. Yosihda, M. Sasaki, K. Umehara, D. Miyazaki, Y. Tadokoro, K. Murata, S. Doushou and A. Matsuzawa," A CMOS image sensor with analog two-dimensional DCT-based compression circuits for one-chip camera", IEEE J. Solid-State Circuits, Vol.32, No.12, pp.2030-2041, Dec.1997.
  2. S. Kawahito, M. Yoshida, M. Sasaki, K. Umehara, Y. Tadokoro, K. Murata, S. Doushou and A. Matsuzawa, "A compressed digital output CMOS image sensor with analog 2-D DCT processors and an ADC/Quantizer", Dig. Tech. Papers, IEEE Int. Solid-State Circuits Conf., pp.184-185, Feb. 1997.

[Home] / [Research project]
Copyright(C)1999-2007, Imaging Devices Laboratory
e-mail: webmaster@idl.rie.shizuoka.ac.jp